? semiconductor components industries, llc, 2011 may, 2011 ? rev. 6 1 publication order number: mc74vhct257a/d mc74vhct257a quad 2-channel multiplexer with 3-state outputs the mc74vhct257a is an advanced high speed cmos quad 2 ? channel multiplexer fabricated with silicon gate cmos technology. it achieves high speed operation similar to equivalent bipolar schottky ttl while maintaining cmos low power dissipation. it consists of four 2 ? input digital multiplexers with common select (s) and enable (oe ) inputs. when (oe ) is held high, selection of data is inhibited and all the outputs go low. the select decoding determines whether the a or b inputs get routed to the corresponding y outputs. the vhct inputs are compatible with ttl levels. this device can be used as a level converter for interfacing 3.3 v to 5.0 v because it has full 5.0 v cmos level output swings. the vhct257a input structures provide protection when voltages between 0 v and 5.5 v are applied, regardless of the supply voltage. the output structures also provide protection when v cc = 0 v. these input and output structures help prevent device destruction caused by supply voltage ? input/output voltage mismatch, battery backup, hot insertion, etc. the internal circuit is composed of three stages, including a buf fered output which provides high noise immunity and stable output. the inputs tolerate voltages up to 7.0 v, allowing the interface of 5.0 v systems to 3.0 v systems. features ? high speed: t pd = 4.1 ns (typ) at v cc = 5.0 v ? low power dissipation: i cc = 4.0 a (max) at t a = 25 c ? ttl ? compatible inputs: v il = 0.8 v; v ih = 2.0 v ? power down protection provided on inputs and outputs ? balanced propagation delays ? designed for 2.0 v to 5.5 v operating range ? low noise: v olp = 0.8 v (max) ? pin and function compatible with other standard logic families ? latchup performance exceeds 300 ma ? esd performance: human body model > 2000 v; machine model > 200 v ? these devices are pb ? free and are rohs compliant marking diagrams tssop ? 16 dt suffix case 948f soic ? 16 d suffix case 751b see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information http://onsemi.com a = assembly location wl, l = wafer lot y = year ww, w = work week g or = pb ? free package vhct257ag awlyww vhct 257a alyw (note: microdot may be in either location) 1 1 16 1 1 16 1 soeiaj ? 16 m suffix case 966 74vhct257 alywg 1 16 function table oe s y0 ? y3 a0 ? a3, b0 ? b3 = the levels of the respective data ? word inputs. h l l x l h z a0 ? a3 b0 ? b3 inputs outputs
mc74vhct257a http://onsemi.com 2 this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high ? impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open. figure 1. pin assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 s y0 b0 a0 y1 b1 a1 gnd y3 b3 a3 oe v cc b2 a2 y2 3 oe s a0 b0 a1 b1 a2 b2 2 5 6 11 10 14 13 12 9 7 4 y0 mux y1 y2 y3 en 1 15 a3 b3 g1 1 1 figure 2. iec logic symbol figure 3. expanded logic diagram oe i 0a i 1a i 0b i 1b i 0c i 1c i 0d i 1d s z a z b z c z d
mc74vhct257a http://onsemi.com 3 maximum ratings symbol parameter value unit v cc positive dc supply voltage ? 0.5 to +7.0 v v in digital input voltage ? 0.5 to +7.0 v v out dc output voltage output in 3 ? state high or low state ? 0.5 to +7.0 ? 0.5 to v cc +0.5 v i ik input diode current ? 20 ma i ok output diode current 20 ma i out dc output current, per pin 25 ma i cc dc supply current, v cc and gnd pins 75 ma p d power dissipation in still air soic package tssop 200 180 mw t stg storage temperature range ? 65 to +150 c v esd esd withstand voltage human body model (note 1) machine model (note 2) charged device model (note 3) >2000 >200 >2000 v i latchup latchup performance above v cc and below gnd at 125 c (note 4) 300 ma ja thermal resistance, junction ? to ? ambient soic package tssop 143 164 c/w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. tested to eia/jesd22 ? a114 ? a 2. tested to eia/jesd22 ? a115 ? a 3. tested to jesd22 ? c101 ? a 4. tested to eia/jesd78 recommended operating conditions symbol characteristics min max unit v cc dc supply voltage 4.5 5.5 v v in dc input voltage 0 5.5 v v out dc output voltage 0 5.5 v t a operating temperature range, all package types ? 55 125 c t r , t f input rise or fall time v cc = 5.0 v + 0.5 v 0 20 ns/v device junction temperature versus time to 0.1% bond failures junction temperature c time, hours time, years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 1 1 10 100 1000 time, years normalized failure rate t j = 80 c t j = 90 c t j = 100 c t j = 110 c t j = 130 c t j = 120 c failure rate of plastic = ceramic until intermetallics occur figure 4. failure rate vs. time junction temperature
mc74vhct257a http://onsemi.com 4 dc characteristics (voltages referenced to gnd) v cc t a = 25 c t a 85 c ? 55 c t a 125 c symbol parameter condition (v) min typ max min max min max unit v ih minimum high ? level input voltage 4.5 to 5.5 2 2 2 v v il maximum low ? level input voltage 4.5 to 5.5 0.8 0.8 0.8 v v oh maximum high ? level output voltage v in = v ih or v il i oh = ? 50 a 4.5 3.94 3.8 3.66 v v in = v ih or v il i oh = ? 8 ma 4.5 3.94 3.8 3.66 v ol maximum low ? level output voltage v in = v ih or v il i ol = 50 a 4.5 0 0.1 0.1 0.1 v v in = v ih or v il i oh = 8 ma 4.5 0.36 0.44 0.52 i in input leakage current v in = 5.5 v or gnd 0 to 5.5 0.1 1.0 1.0 a i oz maximum 3 ? state leakage current v in = v ih or v il v out = v cc or gnd 5.5 0.2 5 2.5 2.5 a i cct maximum quiescent supply current v in = v cc or gnd 5.5 1.35 1.5 1.65 ma i cc additional quiescent supply current (per pin) v in = v cc or gnd 5.5 4.0 40 40 a i opd output leakage current v out = 5.5 v 0 0.5 5 5 a ????????????????????????????????? ????????????????????????????????? ac electrical characteristics (input t r = t f = 3.0ns) ???? ???? ???? symbol ???????? ???????? ???????? ???????? ???????? ???????? ?????? ?????? c ????? ????? 85 c ?????? ?????? ? 55 c t a 125 c ?? ?? ?? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? t plh , t phl ???????? ???????? ???????? ???????? ???????? ???????? 0.3 v c l = 15 pf c l = 50 pf ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ?? ?? ?? ?? ???????? ???????? ???????? 0.5 v c l = 15 pf c l = 50 pf ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ???????? ???????? 0.3 v c l = 15 pf c l = 50 pf ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ?? ?? ?? ?? ???????? ???????? ???????? 0.5 v c l = 15 pf c l = 50 pf ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ???????? ???????? 0.3 v c l = 15 pf r l = 1 k c l = 50 pf ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ?? ?? ?? ?? ???????? ???????? ???????? 0.5 v c l = 15 pf r l = 1 k c l = 50 pf ??? ??? ??? ??? ??? ??? ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ???????? ???????? 0.3 v c l = 50 pf r l = 1 k ??? ??? ??? ??? 10.5 ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ?? ?? ?? ?? ???????? ???????? ???????? 0.5 v c l = 50 pf r l = 1 k ??? ??? ??? ??? ??? ??? 9.5 ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ???? ???? ?? ?? typical @ 25 c, v cc = 5.0 v pf 20 5. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc . c pd is used to determine the no ? load dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc . noise characteristics (input t r = t f = 3.0 ns, c l = 50 pf, v cc = 5.0 v) symbol characteristic t a = 25 c unit typ max v olp quiet output maximum dynamic v ol 0.3 0.8 v v olv quiet output minimum dynamic v ol ? 0.3 ? 0.8 v v ihd minimum high level dynamic input voltage 2.0 v v ild maximum low level dynamic input voltage 0.8 v
mc74vhct257a http://onsemi.com 5 a, b or s figure 5. switching waveform figure 6. switching waveform figure 7. test circuit v cc gnd y t phl t plh 50% 50% v cc figure 8. test circuit input *includes all probe and jig capacitance output test point c l * 1 k connect to v cc when testing t plz and t pzl. connect to gnd when testing t phz and t pzh. device under test figure 9. input equivalent circuit *includes all probe and jig capacitance c l * test point device under test output 50% 50% v cc 50% v cc v cc gnd high impedance v ol + 0.3v v oh - 0.3v y y oe t pzl t plz t pzh t phz high impedance ordering information device package shipping ? mc74vhct257adg soic ? 16 (pb ? free) 48 units / rail mc74vhct257adr2g soic ? 16 (pb ? free) 2500 tape & reel mc74vhct257adtg tssop ? 16* 96 units / rail m74vhct257adtr2g tssop ? 16* 2500 tape & reel MC74VHCT257AMG soeiaj ? 16 (pb ? free) 50 units / rail ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb ? free.
mc74vhct257a http://onsemi.com 6 package dimensions soic ? 16 d suffix case 751b ? 05 issue k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p ? b ? ? a ? m 0.25 (0.010) b s ? t ? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 6.40 16x 0.58 16x 1.12 1.27 dimensions: millimeters 1 pitch soldering footprint 16 89 8x
mc74vhct257a http://onsemi.com 7 package dimensions tssop ? 16 case 948f ? 01 issue b ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . section n ? n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 16x ref k n n 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint
mc74vhct257a http://onsemi.com 8 package dimensions soeiaj ? 16 case 966 ? 01 issue a h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc74vhct257a/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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